CS Other Presentations

Department of Computer Science - University of Cyprus

Besides Colloquiums, the Department of Computer Science at the University of Cyprus also holds Other Presentations (Research Seminars, PhD Defenses, Short Term Courses, Demonstrations, etc.). These presentations are given by scientists who aim to present preliminary results of their research work and/or other technical material. Other Presentations serve as a forum for educating Computer Science students and related announcements are disseminated to the Department of Computer Science (i.e., the csall list):
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Presentations Coordinator: Demetris Zeinalipour

PhD Defense: Task Data-flow Execution on Many-core Systems, Andreas Diavastos (University of Cyprus, Cyprus), Monday, November 13, 2017, 09:00-10:00 EET.

The Department of Computer Science at the University of Cyprus cordially invites you to the PhD Defense entitled:

Task Data-flow Execution on Many-core Systems

Speaker: Andreas Diavastos
Affiliation: University of Cyprus, Cyprus
Category: PhD Defense
Location: Room 148, Faculty of Pure and Applied Sciences (FST-01), 1 University Avenue, 2109 Nicosia, Cyprus (directions)
Date: Monday, November 13, 2017
Time: 09:00-10:00 EET
Host: Paraskevas Evripidou (skevos-AT-cs.ucy.ac.cy)
URL: https://www.cs.ucy.ac.cy/colloquium/presentations.php#cs.ucy.pres.2017.diavastos

Improving application performance in an efficient and effective way is a joint task between both the hardware and the software. Performance scaling is determined by a combination of the following factors: the degree of parallelism, programmability, low-overhead runtime systems, locality-aware execution, efficient use of the available resources and scalable architecture designs. This work focuses on the Task Data-flow model as the most appropriate for exploiting large amounts of parallelism. Therefore is it used to explore ways to address the above-mentioned factors for scaling application performance on commodity hardware: from conventional multi-cores to future many-cores with hundreds of cores. Our efforts resulted in implementations that contribute towards the above factors with: (1) the first software integration of transactions into a task-based Data-flow implementation as a way to introduce shared state in the Data-flow model, (2) extending the OpenMP v4.5 API to support explicit task resource allocation mechanisms and variable loop task granularity as a way to increase data-locality even for loop tasks with inter-dependencies, (3) the first Data-Driven Multi-threading implementation for many-core processors without requiring hardware cache-coherence mechanisms, (4) the implementation of a novel lightweight distributed triggering runtime system with low-overhead scheduling that scales regardless of the number of cores and (5) the integration of machine-learning techniques in a real parallel programming framework that automatically produces efficient scheduling policies.

Short Bio:
Andreas Diavastos is a Ph.D. candidate at the Department of Computer Science under the supervision of Prof. Pedro Trancoso. He holds a BSc degree in Computer Science from the University of Cyprus and is currently a student member of the European Network on High Performance and Embedded Architecture and Compilation (HiPEAC). He worked at the Department of Computer Science at the University of Cyprus as a Research Assistant for the EU FP7 TERAFLUX project and the RPF Cy-Tera HPC project (facilitated at the CYI). He also worked as a Research Assistant at The Cyprus Institute on the RPF GPU Clusterware project. During his studies he was awarded a Ph.D. Scholarship from the Graduate School of the University of Cyprus and assisted in teaching classes such as Computer Architecture, Parallel Processing, C and Python Programming. During his Ph.D., he was granted a fully-funded HiPEAC Industrial Internship at Recore Systems in Netherlands. He is currently working as a Research Assistant on the Horizon2020 UniServer Project. He has attended several international conferences for presenting his published research work and has advanced knowledge of various parallel programming languages and tools, as well as hands-on experience with HPC systems. His research interests include Computer Architecture, Many-core designs, Parallel Programming, Data-flow Execution and Runtime systems for High Performance Computing.

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