CS Colloquium Series @ UCY
The Department of Computer Science at the University of Cyprus holds research colloquiums and social hours approximately once weekly. All university students, faculty, and staff are invited to attend. Notifications about new and upcoming events are automatically disseminated to a variety of institutional lists.
If you don't receive these notifications, but want to get informed about upcoming colloquium announcements, you can do the following:List RSS Directions
Colloquium Coordinator: Demetris Zeinalipour
Colloquium: WCET Analysis of Tasks Executed on Multicore Architectures with Shared Caches, Dr. Damien Hardy (IRISA & University of Rennes, France), Monday, February 28, 2011, 11:00-12:00 EET.
The Department of Computer Science at the University of Cyprus cordially invites you to the Colloquium entitled:
WCET Analysis of Tasks Executed on Multicore Architectures with Shared Caches
Speaker: Dr. Damien Hardy
Hard real-time systems are subject to timing constraints and failure to respect them can cause economic, ecological or human disasters. The validation process, which guarantees the safety of such software, is based on the knowledge of the worst-case execution time (WCET) of each task. Determining the WCET is a difficult problem for modern architectures because of complex hardware mechanisms, such as bus and shared caches, which cause significant execution time variability. In this talk, we present a static analysis of the worst-case timing behavior of tasks running on multicore processors with a cache hierarchy in which some cache levels are shared among cores. We will first introduce existing static analyses of cache hierarchies for single-core processors. Then, we will see how to integrate the notion of inter-task conflicts occuring in shared cache levels present in multicore processors and, how to tighten WCET estimations by reducing this kind of conflicts by using a compiler directed bypass scheme. Experimental results show that our approach allows to drastically reduce the WCET of tasks compared to methods which consider all inter-task conflicts and do not attempt to reduce their amount.
Damien Hardy is a temporary teaching and research associate at the University of Rennes, France. He received his PhD degree in computer science from the University of Rennes in 2010. His research interests include real-time systems, compilers, and computer architecture. His current research focuses on timing analysis of real-time software, more precisely on static worst-case execution time prediction for modern hardware used in embedded systems with particular emphasis on the memory hierarchy.
|Mailing List: https://listserv.cs.ucy.ac.cy/mailman/listinfo/cs-colloquium|
|Sponsor: The CS Colloquium Series is supported by a generous donation from