Our work with title “Auto-tuning Static Schedules for Task Data-flow Applications” has been accepted for publication and presentation at the First Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems (ANDARE’17), Portland, Oregon, USA, September 2017 (co-located with PACT 2017)
Wien, Schönbrunn, 2014, copyright www.peterrigaud.com
Our work with title “Low-cost Sub-5W Processors for Edge HPC” has been accepted for publication and presentation at the
20th Euromicro Conference on Digital System Design (DSD 2017), Vienna, Austria, August-September 2017.
Our works with title “Odd-ECC: On-demand DRAM Error Correcting Codes” and “PHOENIX: Efficient Computation in Memory” have been accepted for publication and presentation at the
Third International Symposium on Memory Systems (MEMSYS 2017), Washington DC, USA, October 2017.
Our work with title “Heterogeneous- and NUMA-aware Scheduling for Many-core Architectures” has been accepted for publication and presentation at the
10th ACM International Systems and Storage Conference (SYSTOR 2017), Haifa, Israel, May 2017.
Our work with title “Using Personality Metrics to Improve Cache Interference Management in Many-Core Processors” has been accepted for publication at the
ACM Computing Frontiers 2017, Siena, May 2017
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