The Department of Computer Science at the University of Cyprus cordially invites you to the Invited Course Lecture entitled:
Data Parallel Acceleration of Decision Support Queries Using Cell/BE and GPUs
Speaker: Pedro Trancoso
Decision Support System (DSS) workloads are known to be one of the most time-consuming database workloads that processes large data sets. Traditionally, DSS queries have been accelerated using large-scale multiprocessor. The topic addressed in this work is to analyze the benefits of using high-performance/low-cost processors such as the GPUs and the Cell/BE to accelerate DSS query execution. In order to overcome the programming effort of developing code for different architectures, in this work we explore the use of a platform, Rapidmind, which offers the possibility of executing the same program on both Cell/BE and GPUs. To achieve this goal we propose data-parallel versions of the original database scan and join algorithms. In our experimental results we compare the execution of three queries from the standard DSS benchmark TPC-H on two systems with two different GPU models, a system with the Cell/BE processor, and a system with dual quad-core Xeon processors. The results show that parallelism can be well exploited by the GPUs. The speedup values observed were up to 21x compared to a single processor system.
Pedro Trancoso received the undergraduate degree in electrical and computer engineering from Instituto Superior Tecnico (IST), Technical University of Lisbon, Lisbon, Portugal, in 1993, the MSc and PhD degrees in computer science from the University of Illinois at Urbana-Champaign, Illinois, U.S.A., in 1995 and 1998. He is currently an Assistant Professor at the Department of Computer Science of the University of Cyprus, Nicosia, Cyprus. He has worked at IBM T.J. Watson Research Center, U.S.A. as a researcher (1997), at the University of Illinois at Urbana-Champaign, U.S.A. as a visiting scholar (2000), and at Intercollege Limassol, Cyprus as an assistant professor (1998-2001). He has published several papers in the area of computer architecture, with a focus on the memory hierarchy, intelligent memory technologies, architecture-aware optimizations for database workloads and benchmarking, power-performance efficient architectures, multi-core architectures, and the use of graphics processors for general purpose applications. He was a recipient of a Fulbright scholarship to pursue his PhD studies, an EU-Mobility grant and a HPC-Europa grant to visit, as a researcher, the Supercomputing Center CESCA-CEPBA at the Universitat Politecnica de Catalunya, Barcelona, Spain, in 2002 and 2005. He is a member of the CoreGrid Network of Excellence, the IEEE and ACM. He has been a member in the Program Committee of several International Conferences including Parallel Architecture and Compilation Techniques, PACT 2004, and Local-Chair of Topic 7 (Parallel Computer Architecture and ILP) of EuroPar 2005. He is currently a member of the Editorial Board for the International Journal of High-Performance System Architecture. He is the head of the CASPER (Computer Architecture and Systems Performance Evaluation Research) research group. His research interest is in the area of computer architecture, with a focus on the memory hierarchy, intelligent memory technologies, architecture-aware optimizations for database workloads and benchmarking, power-performance efficient architectures, multi-core architectures, and the use of graphics processors for general purpose applications.
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