CS Colloquium Series @ UCY

Department of Computer Science - University of Cyprus

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Colloquium Coordinator: Demetris Zeinalipour

Colloquium: Toward Programmable High-Performance Multicores, Prof. Josep Torrellas (University of Illinois, Urbana-Champaign, USA), Monday, July 1, 2013, 11:00-12:00 EET.


The Department of Computer Science at the University of Cyprus cordially invites you to the Colloquium entitled:

Toward Programmable High-Performance Multicores

 

Speaker: Prof. Josep Torrellas
Affiliation: University of Illinois, Urbana-Champaign, USA
Category: Colloquium
Location: Room 148, Faculty of Pure and Applied Sciences (FST-01), 1 University Avenue, 2109 Nicosia, Cyprus (directions)
Date: Monday, July 1, 2013
Time: 11:00-12:00 EET
Host: Pedro Trancoso (pedro-AT-cs.ucy.ac.cy)
URL: https://www.cs.ucy.ac.cy/colloquium/index.php#cs.ucy.2013.torrellas

Abstract:
One of the biggest challenges facing us today is how to design parallel architectures that attain high performance while efficiently supporting a programmable environment. In this talk, I describe novel organizations that will make the next generation of multicores more programmable and higher performance. Specifically, I show how to automatically reuse the upcoming transactional memory hardware for optimized code generation. Next, I describe a prototype of Record&Replay hardware that brings program monitoring for debugging and security to the next level of capability. I also describe a new design of hardware fences that is overhead-free and requires no software support. Finally, if time permits, I will outline architectural support to detect sequential consistency violations transparently.

Short Bio:
Josep Torrellas is a Professor of Computer Science and Electrical and Computer Engineering at the University of Illinois at Urbana-Champaign (UIUC). He is a Fellow of IEEE and ACM. He is the Director of the Center for Programmable Extreme-Scale Computing, a center funded by DARPA, DOE, and NSF that focuses on architectures for extreme energy and power efficiency. He also directs the Intel-Illinois Parallelism Center (I2PC), a center created by Intel to advance parallel computing in clients. He has made contributions to parallel computer architecture in the areas of shared-memory multiprocessor organizations, cache hierarchies and coherence protocols, thread-level speculation, and hardware and software reliability. He received a Ph.D. from Stanford University.

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Sponsor: The CS Colloquium Series is supported by a generous donation from Microsoft



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