http://www.cs.ucy.ac.cy/~pedro/casper/ 2012-02-09T05:24:03+02:00 http://www.cs.ucy.ac.cy/~pedro/casper/ http://www.cs.ucy.ac.cy/~pedro/casper/lib/images/favicon.ico text/html 2012-01-25T13:13:02+02:00 Pedro Trancoso http://www.cs.ucy.ac.cy/~pedro/casper/doku.php?id=publications&rev=1327489982&do=diff * P. Trancoso and P. Evripidou, “Parallel Computer Architecture” in “Handbook of Parallel Computing and Statistics” E.J. Kontoghiorghes (ed.), pp. 43-73, Chapman & Hall/CRC, Florida, January 2006. * P. Trancoso and J. Torrellas, “Exploiting Intelligent Memory for Database Workloads” in “High Performance Memory Systems” H. Hadimioglu (ed.), pp. 279-292. Springer-Verlag, New York, September 2003. text/html 2012-01-25T13:07:05+02:00 Pedro Trancoso http://www.cs.ucy.ac.cy/~pedro/casper/doku.php?id=presentations&rev=1327489625&do=diff text/html 2012-01-25T12:57:46+02:00 Pedro Trancoso http://www.cs.ucy.ac.cy/~pedro/casper/doku.php?id=people&rev=1327489066&do=diff text/html 2012-01-25T12:46:55+02:00 Pedro Trancoso http://www.cs.ucy.ac.cy/~pedro/casper/doku.php?id=projects&rev=1327488415&do=diff TERAFLUX In the TERAFLUX project we study the future of Teradevice systems. These systems will expose a large amount of parallelism (1000+ cores) that cannot be exploited efficiently by current applications and programming models. The aim of this project is to propose a complete solution that is able to harness the large-scale parallelism in an efficient way. The main objectives of the TERAFLUX project are the programming model, compiler analysis, and a scalable, reliable, architecture based m… text/html 2012-01-25T11:40:44+02:00 Pedro Trancoso http://www.cs.ucy.ac.cy/~pedro/casper/doku.php?id=start&rev=1327484444&do=diff